A Real-Time Virtual Re-convergence Hardware Platform
نویسندگان
چکیده
In this paper, we propose a real-time virtual reconvergence hardware platform especially to reduce the visual fatigue caused by stereoscopy. Our virtual re-convergence hardware platform, which consists of image rectification, disparity estimation, depth postprocessing, and virtual view control, is implemented in 60 fps on a single Xilinx Virtex-5 FPGA chip.
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